RC0402JR-071ML — 1 MΩ ±5% in 0402 package, 0.063 W (1/16 W) rated power, TCR ≈ 100 ppm/°C, operating −55 to +155 °C. This datasheet-driven snapshot sets expectations for drift, power handling and PCB implementation for high-impedance designs.
This article helps engineers quickly parse the datasheet, validate test requirements, and apply the part in PCB layouts and QA flows. It uses measured/spec values, simple calculations and clear test guidance to speed selection and verification.
Point: Key electrical and physical specs distilled from the datasheet for rapid decision-making. Evidence: table below lists the primary parameters and unit conventions. Explanation: use these baseline entries for BOM checks and incoming inspection criteria.
| Parameter | Value |
|---|---|
| Resistance | 1 MΩ |
| Tolerance | ±5% |
| Rated power | 0.063 W (1/16 W) |
| Package | 0402 (1005 metric) — 1.0 × 0.5 mm (40 × 20 mil) |
| Temperature coefficient | ≈100 ppm/°C (typical thick-film) |
| Operating temperature | −55 to +155 °C |
| Construction | Thick-film, moisture resistant, non-inductive |
Point: 0402 nominal size is 1.0 × 0.5 mm (40 × 20 mil). Evidence: common land-pattern guidance follows IPC-style gross dimensions. Explanation: recommended pad gross dimensions: pad length 0.6–0.8 mm, pad width 0.35–0.45 mm, pad-to-pad clearance ~0.2–0.3 mm; verify against your CAD library and assembly house for solder fillet vs. fillet-optimized footprints.
Point: Tolerance and TCR materially affect circuit behavior at 1 MΩ. Evidence: with TCR = 100 ppm/°C, a ΔT = 125 °C yields ΔR = 1 MΩ × 100e−6 × 125 = 12.5% (125 kΩ), exceeding ±5% tolerance. Explanation: measure high-value resistors with guarded 4-wire methods; typical test stimuli are low-voltage sources (1 V) with a picoammeter or SMU to avoid bias heating. Use instrument accuracy ≤0.1% of reading and sample sizes (e.g., 30 pcs) for QC runs.
Point: 0.063 W rating must be derated with ambient temperature and PCB thermal mass. Evidence: linear derating to zero at +155 °C is typical for thin/thick-film chips.
Explanation: example table below shows allowable continuous dissipation at selected ambient temperatures assuming linear derating to 0 at 155 °C; always confirm with your PCB copper area and assembly constraints.
| Ambient (°C) | Allowed P (W) |
|---|---|
| 25 | 0.063 |
| 70 | 0.063 |
| 100 | ≈0.036 |
| 125 | ≈0.022 |
| 155 | 0.000 |
Note: peak/pulse events can exceed continuous power briefly but watch voltage limits (Vmax ≈ sqrt(P·R)) and package breakdown; use thermal relief or additional copper if continuous dissipation approaches limits.
Point: Thick-film 0402 parts follow standard qualification tests; evidence: typical tests and pass criteria are summarized below. Explanation: prioritize tests that impact surface leakage and resistance drift when working with 1 MΩ parts.
| Test | Typical Conditions | Pass Criteria |
|---|---|---|
| Resistance check | ambient, 4‑wire | within ± tolerance |
| TCR verification | −40 to +85 °C ramps | TCR ≈ specified ± tolerance |
| Short-time overload | 2.5× rated power, 5 s | ΔR within spec |
| Moisture resistance | 85 °C / 85% RH, biased | No excessive leakage/drift |
| Solderability | reflow per profile | wetting acceptable |
Point: key graphs show resistance vs. temperature, load-life and humidity bias. Evidence: red flags include drift beyond tolerance after load life or abrupt jumps post-humidity. Explanation: record in-house results with a simple table (test, conditions, nominal, measured min/max, pass/fail) to compare to datasheet expectations and flag lot-level anomalies early.
Point: layout and process strongly influence reliability for high-R parts. Evidence: pad geometry, stencil aperture and reflow profile control solder fillet and tombstoning risk. Explanation: use a balanced paste deposit, slightly longer pads for fillet stability, controlled reflow ramp to minimize rapid temperature gradients, and minimize copper beneath pads if you must limit heat sinking; always include post-reflow optical and X‑ray inspection criteria.
Point: in-circuit readings for 1 MΩ are easily skewed by parallel paths and leakage. Evidence: guarding and isolation methods reduce error. Explanation: when possible, measure out-of-circuit with 4-wire; for in-circuit, use guarded input, low-leakage fixtures, and remove adjacent bias sources. If parallel impedance exists, use differential techniques or clamp/divert circuitry during test to isolate the resistor.
Point: concise sign-off checklist to confirm suitability. Evidence: apply these checks during design review. Explanation: ensure drift and tolerance fit the circuit, power dissipation stays within derating margins, cleaning and contamination controls are planned, and incoming inspection includes a guarded 4-wire measurement. For final reference include RC0402JR-071ML on the approved parts list only after passing these checks.
Next steps: obtain the official datasheet, perform the recommended in-house verification tests, and add the sign-off checklist to incoming inspection before approving the part for production.
Answer: Use a guarded 4‑wire fixture or SMU set to a low source voltage (e.g., 1 V) and picoammeter range; ensure fixture leakage is <1% of expected current. For in-circuit checks, isolate parallel paths or use known guard techniques to avoid false low readings.
Answer: The main failure modes are moisture-induced surface leakage, irreversible drift after overload or long-term biased humidity exposure, and mechanical damage from improper placement. Mitigate by cleaning flux residues, controlling reflow, and verifying moisture resistance on incoming lots.
Answer: Yes, but watch bias currents and noise. High source impedance increases susceptibility to EMI and leakage; if the sensed node is high impedance, add guarding, lower source impedance, or buffer with an op amp input to preserve accuracy and repeatability.